Research Interests

AI for Chip Design, Machine Learning, Electronic Design Automation

"Integrated Circuit Design and Artificial Intelligence: A Paradigm Shift in Electronic Design Automation": The modern integrated chip (IC) design process—spanning logic synthesis, placement, routing, and optimization— requires managing billions of interconnected variables while optimizing for multifaceted objectives such as wirelength, power, performance, and area. Despite decades of development, state-of-the-art Electronic Design Automation (EDA) tools still lack the ability to learn from past iterations.

Reinforcement learning (RL) offers a transformative paradigm by intertwining exploration, exploitation, and decision-making with learning. My research focuses on harnessing graph neural networks (GNNs) and RL to learn optimal decision sequences in complex design optimization problems.

Biographical Sketch

I received my Ph.D. in Computer Engineering from the University of California, San Diego. I was advised by Prof. Chung-Kuan Cheng, Prof. Tajana Rosing, and Prof. Bill Lin.

Prior to this, I obtained a Dual Degree (B.E. in Electrical and Electronics Engineering and M.Sc. in Physics) from BITS Pilani in 2011.

Currently, I am a Research Scientist at Intel AI Labs in Santa Clara, USA.